hola amigos estoy tratando de controlar un lcd de 16x2 en vhdl pero no logro mostar nada. el codigo siguiente lo que hace es mostrar numero de acuerdo a las veces en que pulse pero me da los siguientes errores
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 14:25:42 10/22/2009
-- Design Name:
-- Module Name: LCD - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity LCD is
port(reset:in std_logic;
teclado:in std_logic_vector (1 downto 0);
clk: in std_logic;
rs: out std_logic;
rwut std_logic;
enut std_logic;
al_disput std_logic_vector (1 downto 0);
lcdut std_logic_vector (7 downto 0));
end LCD;
architecture Behavioral of LCD is
signal clkout: std_logic:='0';
signal nop: std_logic:='0';
signal count, count1: integer:=0;
signal letra_e:std_logic:='0';
signal letra:std_logic_vector (7 downto 0):=X"FE";
signal al_reg:std_logic_vector (1 downto 0);
signal del_reg:std_logic_vector (1 downto 0);
begin
------------------------------------------------------------------
-- codificador del teclado
------------------------------------------------------------------
process (teclado)
begin
case teclado is
when "10" => al_reg <= "01"; ---el cero
letra <= X"31";
letra_e <= '1';
when "01" => al_reg <= "10"; ---el uno
letra <= X"32";
letra_e <= '1';
when others => al_reg <= "11";
letra_e <= '0';
end case;
end process;
------------------------------------------------------------------
-- registro temporal 1
------------------------------------------------------------------
PROCESS(al_reg)
BEGIN
IF clk = '1' THEN
del_reg <= al_reg;
END IF;
END PROCESS;
-------------------------------------------------
--Rutina de retardo de clock para el LCD
-------------------------------------------------
process (clk)
begin
if clk'event and clk ='1' then
count1<= count1 + 1;
if count1 = 100000 then
clkout <= not clkout;
count1 <= 0;
end if;
end if;
end process;
--------------------------------------------------
----maquina de estado del LCD
--------------------------------------------------
process (reset,clkout)
variable count:integer range 0 to 131072; --17bits
begin
if (reset ='0') then
count:=0;
elsif(clkout'event and clkout ='1') then
if (count = 34) then
if letra_e ='1' then
count:=34;
else
count<=32;
end if;
end if;
if count = 32 then
if letra_e='1' then
count<=33;
end if;
count<=count;
else
if count =34 then
count<= 34;
else
count<= count+1;
end if;
end if;
case count is
when 0 => en<='0';
when 1 => en<='1';
rw<='0';
rs<='0';
lcd<=X"38";
when 2 => en<='0';
when 3 => en<='1';
rw<='0';
rs<='0';
lcd<=X"38";
when 4 => en<='0';
when 5 => en<='1';
rw<='0';
rs<='0';
lcd<=X"38";
when 6 => en<='0';
when 7 => en<='1';
rw<='0';
rs<='0';
lcd<=X"06";
when 8 => en<='0';
when 9 => en<='1';
rw<='0';
rs<='0';
lcd<=X"0C";
when 10 => en<='0';
when 11 => en<='1';
rw<='0';
rs<='0';
lcd<=X"01";
when 12 => en<='0';
when 13=> en<='1';
rw<='0';
rs<='0';
lcd<=X"80";
when 14 => en<='0';
when 15 => en<='1';
rw<='0';
rs<='1';
lcd<=X"45"; --E
when 16 => en<='0';
when 17 => en<='1';
rw<='0';
rs<='1';
lcd<=X"54"; --T
when 18 => en<='0';
when 19 => en<='1';
rw<='0';
rs<='1';
lcd<=X"4E"; --N
when 20 => en<='0';
when 21 => en<='1';
rw<='0';
rs<='1';
lcd<=X"FE"; -- " "
when 22 => en<='0';
when 23 => en<='1';
rw<='0';
rs<='1';
lcd<=X"31"; --1
when 24 => en<='0';
when 25 => en<='1';
rw<='0';
rs<='1';
lcd<=X"30"; --0
when 26 => en<='0';
when 27 => en<='1';
rw<='0';
rs<='1';
lcd<=X"34"; --4
when 28 => en<='0';
when 29 => en<='1';
rw<='0';
rs<='1';
lcd<=X"30"; --0
when 30 => en<='0';
when 31 => en<='1';
rw<='0';
rs<='0';
lcd<=X"0C"; --Nueva linea
when 32 => en<='0';
when 33 => en<='1';
rw<='0';
rs<='1';
lcd<=letra; -- del teclado
when 34 => nop<='0';
end case;
end if;
end process;
end Behavioral;
HDLParsers:410 - "C:/LCD_TEC/LCD.vhd" Line 105. Variable 'count' count is at left hand side of signal assignment statement.
HDLParsers:410 - "C:/LCD_TEC/LCD.vhd" Line 111. Variable 'count' count is at left hand side of signal assignment statement.
HDLParsers:410 - "C:/LCD_TEC/LCD.vhd" Line 113. Variable 'count' count is at left hand side of signal assignment statement.
HDLParsers:410 - "C:/LCD_TEC/LCD.vhd" Line 116. Variable 'count' count is at left hand side of signal assignment statement.
HDLParsers:410 - "C:/LCD_TEC/LCD.vhd" Line 118. Variable 'count' count is at left hand side of signal assignment statement.
HDLParsers:814 - "C:/LCD_TEC/LCD.vhd" Line 123. Integer value 131072 is missing in case.
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 14:25:42 10/22/2009
-- Design Name:
-- Module Name: LCD - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity LCD is
port(reset:in std_logic;
teclado:in std_logic_vector (1 downto 0);
clk: in std_logic;
rs: out std_logic;
rwut std_logic;
enut std_logic;
al_disput std_logic_vector (1 downto 0);
lcdut std_logic_vector (7 downto 0));
end LCD;
architecture Behavioral of LCD is
signal clkout: std_logic:='0';
signal nop: std_logic:='0';
signal count, count1: integer:=0;
signal letra_e:std_logic:='0';
signal letra:std_logic_vector (7 downto 0):=X"FE";
signal al_reg:std_logic_vector (1 downto 0);
signal del_reg:std_logic_vector (1 downto 0);
begin
------------------------------------------------------------------
-- codificador del teclado
------------------------------------------------------------------
process (teclado)
begin
case teclado is
when "10" => al_reg <= "01"; ---el cero
letra <= X"31";
letra_e <= '1';
when "01" => al_reg <= "10"; ---el uno
letra <= X"32";
letra_e <= '1';
when others => al_reg <= "11";
letra_e <= '0';
end case;
end process;
------------------------------------------------------------------
-- registro temporal 1
------------------------------------------------------------------
PROCESS(al_reg)
BEGIN
IF clk = '1' THEN
del_reg <= al_reg;
END IF;
END PROCESS;
-------------------------------------------------
--Rutina de retardo de clock para el LCD
-------------------------------------------------
process (clk)
begin
if clk'event and clk ='1' then
count1<= count1 + 1;
if count1 = 100000 then
clkout <= not clkout;
count1 <= 0;
end if;
end if;
end process;
--------------------------------------------------
----maquina de estado del LCD
--------------------------------------------------
process (reset,clkout)
variable count:integer range 0 to 131072; --17bits
begin
if (reset ='0') then
count:=0;
elsif(clkout'event and clkout ='1') then
if (count = 34) then
if letra_e ='1' then
count:=34;
else
count<=32;
end if;
end if;
if count = 32 then
if letra_e='1' then
count<=33;
end if;
count<=count;
else
if count =34 then
count<= 34;
else
count<= count+1;
end if;
end if;
case count is
when 0 => en<='0';
when 1 => en<='1';
rw<='0';
rs<='0';
lcd<=X"38";
when 2 => en<='0';
when 3 => en<='1';
rw<='0';
rs<='0';
lcd<=X"38";
when 4 => en<='0';
when 5 => en<='1';
rw<='0';
rs<='0';
lcd<=X"38";
when 6 => en<='0';
when 7 => en<='1';
rw<='0';
rs<='0';
lcd<=X"06";
when 8 => en<='0';
when 9 => en<='1';
rw<='0';
rs<='0';
lcd<=X"0C";
when 10 => en<='0';
when 11 => en<='1';
rw<='0';
rs<='0';
lcd<=X"01";
when 12 => en<='0';
when 13=> en<='1';
rw<='0';
rs<='0';
lcd<=X"80";
when 14 => en<='0';
when 15 => en<='1';
rw<='0';
rs<='1';
lcd<=X"45"; --E
when 16 => en<='0';
when 17 => en<='1';
rw<='0';
rs<='1';
lcd<=X"54"; --T
when 18 => en<='0';
when 19 => en<='1';
rw<='0';
rs<='1';
lcd<=X"4E"; --N
when 20 => en<='0';
when 21 => en<='1';
rw<='0';
rs<='1';
lcd<=X"FE"; -- " "
when 22 => en<='0';
when 23 => en<='1';
rw<='0';
rs<='1';
lcd<=X"31"; --1
when 24 => en<='0';
when 25 => en<='1';
rw<='0';
rs<='1';
lcd<=X"30"; --0
when 26 => en<='0';
when 27 => en<='1';
rw<='0';
rs<='1';
lcd<=X"34"; --4
when 28 => en<='0';
when 29 => en<='1';
rw<='0';
rs<='1';
lcd<=X"30"; --0
when 30 => en<='0';
when 31 => en<='1';
rw<='0';
rs<='0';
lcd<=X"0C"; --Nueva linea
when 32 => en<='0';
when 33 => en<='1';
rw<='0';
rs<='1';
lcd<=letra; -- del teclado
when 34 => nop<='0';
end case;
end if;
end process;
end Behavioral;
HDLParsers:410 - "C:/LCD_TEC/LCD.vhd" Line 105. Variable 'count' count is at left hand side of signal assignment statement.
HDLParsers:410 - "C:/LCD_TEC/LCD.vhd" Line 111. Variable 'count' count is at left hand side of signal assignment statement.
HDLParsers:410 - "C:/LCD_TEC/LCD.vhd" Line 113. Variable 'count' count is at left hand side of signal assignment statement.
HDLParsers:410 - "C:/LCD_TEC/LCD.vhd" Line 116. Variable 'count' count is at left hand side of signal assignment statement.
HDLParsers:410 - "C:/LCD_TEC/LCD.vhd" Line 118. Variable 'count' count is at left hand side of signal assignment statement.
HDLParsers:814 - "C:/LCD_TEC/LCD.vhd" Line 123. Integer value 131072 is missing in case.