library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL; --Por la funcion +
entity Scanner is
Port ( Clk : in STD_LOGIC;
Rst : in STD_LOGIC;
S0 : in STD_LOGIC;
S1 : in STD_LOGIC;
S2 : in STD_LOGIC;
S3 : in STD_LOGIC;
SW : in STD_LOGIC_VECTOR (7 downto 0);
LED1, LED2 : out STD_LOGIC_VECTOR (6 downto 0);
AN : out STD_LOGIC_VECTOR (3 downto 0);
ADDRS_out : out STD_LOGIC_VECTOR (4 downto 0));
end entity Scanner;
architecture arq_scanner of Scanner is
type ram_type is array (0 to 31) of std_logic_vector (7 downto 0);
signal ram_32x8 : ram_type := (others => (others => '0'));
signal data_memread: std_logic_vector (7 downto 0);
signal we: std_logic;
type edos is (IDLE, BARRIDO, PUNTUAL, SCAN);
signal ep: edos := IDLE;
signal addrs: std_logic_vector (4 downto 0) := "00000";
signal Dout : std_logic_vector (7 downto 0);
begin
U_Control: process (Clk)
begin
if Clk'event and Clk = '1' then
if Rst = '1' then ep <= IDLE;
else
case ep is when IDLE =>
if S0='1' then ep <= BARRIDO;
elsif S1='1' then ep <= PUNTUAL;
elsif S2='1' then ep <= SCAN; end if;
when BARRIDO =>
if S0='0' then ep <= IDLE; end if;
when PUNTUAL =>
if S1='0' then ep <= IDLE; end if;
when SCAN =>
if S2='0' then ep <= IDLE; end if;
end case;
end if;
end if;
end process U_Control;
rg_addrs: process(Clk)
begin
if Clk'event and Clk='1' then
if Rst = '1' then addrs <= "00000";
elsif (ep=IDLE and S0='1') then addrs <= "00000";
elsif (ep=IDLE and S1='1') then addrs <= SW (4 downto 0);
elsif (ep=IDLE and S2='0') then addrs <= "00000";
elsif (ep=BARRIDO and S0='1') then addrs <= addrs + 1;
elsif (ep=SCAN and data_memread /= SW) then addrs <= addrs + 1;
end if;
end if;
end process rg_addrs;
data_memread <= ram_32x8 (conv_integer(addrs));
sinc:process(Clk)
begin
if Clk'event and Clk='1' then
if WE = '1' then
ram_32x8 ( conv_integer(addrs)) <= SW;
end if;
end if;
end process sinc;
WE <= '1' when (ep = BARRIDO and S3 = '1') or
(ep = PUNTUAL and S3 = '1') else '0';
ADDRS_out <= addrs;
Dout <= data_memread;
with Dout (3 downto 0) SELect
LED1<= "1111001" when "0001", --1
"0100100" when "0010", --2
"0110000" when "0011", --3
"0011001" when "0100", --4
"0010010" when "0101", --5
"0000010" when "0110", --6
"1111000" when "0111", --7
"0000000" when "1000", --8
"0010000" when "1001", --9
"0001000" when "1010", --A
"0000011" when "1011", --b
"1000110" when "1100", --C
"0100001" when "1101", --d
"0000110" when "1110", --E
"0001110" when "1111", --F
"1000000" when others; --0
with Dout (7 downto 4) SELect
LED2<= "1111001" when "0001", --1
"0100100" when "0010", --2
"0110000" when "0011", --3
"0011001" when "0100", --4
"0010010" when "0101", --5
"0000010" when "0110", --6
"1111000" when "0111", --7
"0000000" when "1000", --8
"0010000" when "1001", --9
"0001000" when "1010", --A
"0000011" when "1011", --b
"1000110" when "1100", --C
"0100001" when "1101", --d
"0000110" when "1110", --E
"0001110" when "1111", --F
"1000000" when others; --0
process(Clk)
begin
if Clk'event and Clk='1' then
end if;
end process;
end arq_scanner;