;*******************************************************************
;* This stationery serves as the framework for a user application. *
;* For a more comprehensive program that demonstrates the more *
;* advanced functionality of this processor, please see the *
;* demonstration applications, located in the examples *
;* subdirectory of the "Freescale CodeWarrior for HC08" program *
;* directory. *
;*******************************************************************
; Include derivative-specific definitions
INCLUDE 'derivative.inc'
; export symbols
XDEF _Startup, main
; we export both '_Startup' and 'main' as symbols. Either can
; be referenced in the linker .prm file or from C/C++ later on
XREF __SEG_END_SSTACK ; symbol defined by the linker for the end of the stack
; variable/data section
MY_ZEROPAGE: SECTION SHORT ; Insert here your data definition
; code section
MyCode: SECTION
main:
_Startup:
LDHX #__SEG_END_SSTACK ; initialize the stack pointer
TXS
; Call generated Device Initialization function
JSR MCU_init
CLI ; enable interrupts
mainLoop:
; Insert your code here
JSR TX_OK
STA COPCTL ; feed the watchdog
BRA mainLoop
;//////////////////////////////////////////////////////////////////////////////
TX_OK:
LDA #'H' ;#$48 letra H
STA SCDR
X1: STA COPCTL ; Reset watchdog counter
brclr 7,SCS1,X1 ; ESPERA HASTA QUE TERMINE LA TRANSMISION
LDA #'O' ;#$4f letra o
STA SCDR
X2: STA COPCTL ; Reset watchdog counter
brclr 7,SCS1,X2 ; ESPERA HASTA QUE TERMINE LA TRANSMISION
LDA #'L' ;#$4C letra L
STA SCDR
X3: STA COPCTL ; Reset watchdog counter
brclr 7,SCS1,X3 ; ESPERA HASTA QUE TERMINE LA TRANSMISION
LDA #'A' ;#$40 letra @
STA SCDR
X4: STA COPCTL ; Reset watchdog counter
brclr 7,SCS1,X4 ; ESPERA HASTA QUE TERMINE LA TRANSMISION
LDA #$0D
STA SCDR
X5: STA COPCTL ; Reset watchdog counter
brclr 7,SCS1,X5 ; ESPERA HASTA QUE TERMINE LA TRANSMISION
RTS
;//////////////////////////////////////////////////////////////////////////////
MCU_init:
;** ### MC68HC908AP64_42 "Cpu" init code ... **
;** PE initialization code after reset **
; System clock initialization
; Common initialization of the write once registers
; CONFIG1: COPRS=0,LVISTOP=0,LVIRSTD=0,LVIPWRD=0,LVIREGD=0,SSREC=0,STOP=0,COPD=1
MOV #$01,CONFIG1
; CONFIG2: STOP_ICLKDIS=0,STOP_RCLKEN=0,STOP_XCLKEN=0,OSCCLK1=0,OSCCLK0=0,SCIBDSRC=1
MOV #$01,CONFIG2
; Common initialization of the CPU registers
; ### Init_SCI init code
; SCC1: LOOPS=0,ENSCI=0,TXINV=0,M=0,WAKE=0,ILTY=0,PEN=0,PTY=0
CLR SCC1 ; Disable the SCI module
LDA SCS1 ; Dummy read of the SCS1 registr to clear flags
LDA SCS2 ; Dummy read of the SCS2 registr to clear flags
LDA SCDR ; Dummy read of the SCDR registr to clear flags
; SCC3: R8=0,T8=0,ORIE=0,NEIE=0,FEIE=0,PEIE=0
CLR SCC3
; SCBR: SCP1=0,SCP0=0,SCR2=0,SCR1=1,SCR0=0
MOV #$02,SCBR
; SCC1: LOOPS=0,ENSCI=1,TXINV=0,M=0,WAKE=0,ILTY=0,PEN=0,PTY=0
MOV #$40,SCC1
; SCC2: SCTIE=0,TCIE=0,SCRIE=0,ILIE=0,TE=1,RE=0,RWU=0,SBK=0
MOV #$08,SCC2
RTS
recuerda que el watchdog en estos micros esta habilitado por default este ejemplo solo trasmite para recibir hay qu habiltar las interrupciones en el registro de configuracion serial
Saludos
este ejemplo solo recive y almacena el dato en el registro llamado VARIABLE ESTE EJEMPLO COMO EL ANTERIOR ES PARA UN CRISTAL DE 9.8304
;*******************************************************************
;* This stationery serves as the framework for a user application. *
;* For a more comprehensive program that demonstrates the more *
;* advanced functionality of this processor, please see the *
;* demonstration applications, located in the examples *
;* subdirectory of the "Freescale CodeWarrior for HC08" program *
;* directory. *
;*******************************************************************
; Include derivative-specific definitions
INCLUDE 'derivative.inc'
; export symbols
XDEF _Startup, main
; we export both '_Startup' and 'main' as symbols. Either can
; be referenced in the linker .prm file or from C/C++ later on
XREF __SEG_END_SSTACK ; symbol defined by the linker for the end of the stack
; variable/data section
MY_ZEROPAGE: SECTION SHORT ; Insert here your data definition
VARIABLE DS 1
; code section
MyCode: SECTION
main:
_Startup:
LDHX #__SEG_END_SSTACK ; initialize the stack pointer
TXS
; Call generated Device Initialization function
JSR MCU_init
CLI ; enable interrupts
mainLoop:
; Insert your code here
; JSR TX_OK
STA COPCTL
BRA mainLoop
;//////////////////////////////////////////////////////////////////////////////
TX_OK:
LDA #'H' ;#$48 letra H
STA SCDR
X1: STA COPCTL ; Reset watchdog counter
brclr 7,SCS1,X1 ; ESPERA HASTA QUE TERMINE LA TRANSMISION
LDA #'O' ;#$4f letra o
STA SCDR
X2: STA COPCTL ; Reset watchdog counter
brclr 7,SCS1,X2 ; ESPERA HASTA QUE TERMINE LA TRANSMISION
LDA #'L' ;#$4C letra L
STA SCDR
X3: STA COPCTL ; Reset watchdog counter
brclr 7,SCS1,X3 ; ESPERA HASTA QUE TERMINE LA TRANSMISION
LDA #'A' ;#$40 letra @
STA SCDR
X4: STA COPCTL ; Reset watchdog counter
brclr 7,SCS1,X4 ; ESPERA HASTA QUE TERMINE LA TRANSMISION
LDA #$0D
STA SCDR
X5: STA COPCTL ; Reset watchdog counter
brclr 7,SCS1,X5 ; ESPERA HASTA QUE TERMINE LA TRANSMISION
RTS
;//////////////////////////////////////////////////////////////////////////////
MCU_init:
;** ### MC68HC908JL8_20 "Cpu" init code ... **
;** PE initialization code after reset **
; System clock initialization
; Common initialization of the write once registers
; CONFIG1: COPRS=0,LVID=0,SSREC=0,STOP=0,COPD=1
MOV #$01,CONFIG1
; CONFIG2: IRQPUD=0,LVIT1=0,LVIT0=0,STOP_ICLKDIS=0
CLR CONFIG2
; Common initialization of the CPU registers
; ### Init_SCI init code
; SCC1: LOOPS=0,ENSCI=0,TXINV=0,M=0,WAKE=0,ILTY=0,PEN=0,PTY=0
CLR SCC1 ; Disable the SCI module
LDA SCS1 ; Dummy read of the SCS1 registr to clear flags
LDA SCS2 ; Dummy read of the SCS2 registr to clear flags
LDA SCDR ; Dummy read of the SCDR registr to clear flags
; SCC3: R8=0,T8=0,ORIE=0,NEIE=0,FEIE=0,PEIE=0
CLR SCC3
; SCBR: SCP1=0,SCP0=0,SCR2=0,SCR1=1,SCR0=0
MOV #$02,SCBR
; SCC1: LOOPS=0,ENSCI=1,TXINV=0,M=0,WAKE=0,ILTY=0,PEN=0,PTY=0
MOV #$40,SCC1
; SCC2: SCTIE=0,TCIE=0,SCRIE=1,ILIE=0,TE=1,RE=1,RWU=0,SBK=0
MOV #$2C,SCC2
; ###
CLI ; Enable interrupts
RTS
;** ===================================================================
;** Interrupt handler : isrINT_SCIReceive
;**
;** Description :
;** User interrupt service routine.
;** Parameters : None
;** Returns : Nothing
;** ===================================================================
XDEF isrINT_SCIReceive
isrINT_SCIReceive:
; Write your interrupt code here ...
lda SCS1
LDA SCDR
STA VARIABLE
RTI
; end of isrINT_SCIReceive
;** ===================================================================
;** Interrupt handler : isrINT_SCIError
;**
;** Description :
;** User interrupt service routine.
;** Parameters : None
;** Returns : Nothing
;** ===================================================================
XDEF isrINT_SCIError
isrINT_SCIError:
; Write your interrupt code here ...
RTI
; end of isrINT_SCIError
; Initialization of the CPU registers in FLASH
; MOR: OSCSEL=1
ORG MOR
DC.B $FF
ifndef UNASSIGNED_ISR
UNASSIGNED_ISR: EQU $FFFF ; unassigned interrupt service routine
endif
ORG $FFDE ; Interrupt vector table
_vect:
DC.W UNASSIGNED_ISR ; Int.no. 0 INT_ADC (at FFDE) Unassigned
DC.W UNASSIGNED_ISR ; Int.no. 1 INT_KBI (at FFE0) Unassigned
DC.W UNASSIGNED_ISR ; Int.no. 2 INT_SCITransmit (at FFE2) Used
DC.W isrINT_SCIReceive ; Int.no. 3 INT_SCIReceive (at FFE4) Used
DC.W isrINT_SCIError ; Int.no. 4 INT_SCIError (at FFE6) Used
DC.W UNASSIGNED_ISR ; Int.no. 5 Reserved5 (at FFE8) Unassigned
DC.W UNASSIGNED_ISR ; Int.no. 6 Reserved6 (at FFEA) Unassigned
DC.W UNASSIGNED_ISR ; Int.no. 7 INT_TIM2Ovr (at FFEC) Unassigned
DC.W UNASSIGNED_ISR ; Int.no. 8 INT_TIM2CH1 (at FFEE) Unassigned
DC.W UNASSIGNED_ISR ; Int.no. 9 INT_TIM2CH0 (at FFF0) Unassigned
DC.W UNASSIGNED_ISR ; Int.no. 10 INT_TIM1Ovr (at FFF2) Unassigned
DC.W UNASSIGNED_ISR ; Int.no. 11 INT_TIM1CH1 (at FFF4) Unassigned
DC.W UNASSIGNED_ISR ; Int.no. 12 INT_TIM1CH0 (at FFF6) Unassigned
DC.W UNASSIGNED_ISR ; Int.no. 13 Reserved13 (at FFF8) Unassigned
DC.W UNASSIGNED_ISR ; Int.no. 14 INT_IRQ1 (at FFFA) Unassigned
DC.W UNASSIGNED_ISR ; Int.no. 15 INT_SWI (at FFFC) Unassigned
END ; MODULE MCUinit
;** ###################################################################
;**
;** This file was created by Processor Expert 3.07 [04.34]
;** for the Freescale HC08 series of microcontrollers.
;**
;** ###################################################################
saludos
